{"topic":{"slug":"quantum-error-correction","name":"Quantum Error Correction & Fault Tolerance","domain":"quantum-computing","description":"Surface codes and qLDPC codes, below-threshold logical qubits, real-time decoding, magic-state distillation and cultivation, and resource estimates for fault tolerance.","keywords":["quantum error correction","surface code","fault-tolerant","logical qubit","qLDPC","below threshold","magic state","decoder"],"paper_count":279,"latest_published":"2026-10-27","url":"https://space-kitty.com/topics/quantum-error-correction","api_url":"https://space-kitty.com/api/v1/topics/quantum-error-correction"},"dossier":{"slug":"quantum-error-correction","topic":"quantum-error-correction","title":"Quantum Error Correction & Fault Tolerance: State of the Field (October 2026)","summary":"An expert briefing on quantum error correction as of late October 2026: surface, color and qLDPC codes, bosonic and erasure qubits, real-time decoding, magic-state preparation and fault-tolerant resource estimates. The main takeaway is that below-threshold error suppression has been shown on superconducting hardware, in a short neutral-atom surface-code circuit and, in a 2026 preprint, in trapped-ion color-code memories, so the bottleneck has shifted to logical gates, magic-state cost, decoding latency, correlated errors and scale. Published estimates for factoring RSA-2048 have fallen from 20 million noisy qubits (2019) to under one million (2025); 2026 preprints claim under 100,000 with qLDPC codes, and Shor's algorithm at cryptographically relevant scale on as few as 10,000 reconfigurable atoms, with runtime falling as qubits are added, all assuming hardware not yet demonstrated at scale.","version":1,"published_at":"2026-10-29","updated_at":"2026-10-29","stats":{"words":6183,"citations":90,"claims":40,"timeline":20,"benchmarks":19,"open_problems":8,"key_papers":15,"glossary":19},"verification":{"status":"verified","method":"independent AI fact-check: evidence-pack check of 40 claims + 147 contexts against cited titles and abstracts, plus 15 web checks (arXiv abstract and HTML pages, Crossref and OpenAlex/PubMed records, IBM roadmap post, web searches for attributions); automated citation resolution","claims_checked":40,"issues_fixed":36,"verified_at":"2026-10-29","notes":["10,000-atom Shor figure (summary, executive summary, resource estimates, benchmark row, timeline): the abstract ties 10,000 qubits to no specific instance and gives a runtime only for P-256 at 26,000, so the RSA-2048 'floor' framing was replaced by 'as few as 10,000 for cryptographically relevant Shor instances'; the Pinnacle abstract states no runtime, now noted.","Summary no longer says neutral-atom logical memories are below threshold: the result is a four-round characterization circuit.","Decoding: non-real-time results removed from the 'real-time' bullet; the claim that the most accurate hardware decoders are neural was reduced to what the AlphaQubit abstract supports; Helios neural decoders are reported faster than syndrome extraction (GPU compute time, not feedback latency).","Gross-code figures (12 logical qubits in 288 qubits, nearly 3,000 for surface codes) are now attributed to the authors' simulations and estimate.","Helios color code: 5e-6 confirmed as per cycle at d = 7 (full text); 'steepest scaling' qualified to the experiments surveyed.","IBM roadmap statements (Starling 2029, 200 logical qubits, 10^8 gates; Kookaburra 2026; Cockatoo 2027) checked against IBM's 10 June 2025 post and labeled as company plans; no delivery claimed.","Unsourced positions ('advocates', 'others') in cryptanalytic timelines replaced by a neutral reading; Outlook and forecast claims c36/c37 hedged, c36 marked as unsourced editorial expectation.","'First hardware qLDPC memory', 'far from break-even' and 'today's 8.91%' replaced by 'early hardware memory'; c22 gained the 32-qubit demonstration as a citation.","JSON/body alignment: timeline 2024-08 (real-time decoding only at d = 5), 2025-06 ('key elements' of a universal architecture), 2026-03 (neutral-atom estimate and citation added); key_papers wording (sparse blossom, gross code, cultivation, 2207.06431); open_problems[2] (coherent errors are only simulated); c10 confidence lowered to medium.","Cat-qubit repetition code: the outer phase-flip code is below threshold, but total logical error improved only from 1.75% to 1.65%.","Zuchongzhi 3.2 figures (Λ = 1.40(6), 72-fold, 6.4(5) × 10^-4) confirmed from the PRL abstract record and PRL 135, 260601 from Crossref; processor name and qubit count from web search only. Journal status of 2512.13908 could not be confirmed, so the 'preprint' label was dropped; the 'first' claim for 2207.06431 is attributed to the authors via secondary summary.","Smaller wording fixes: universal-logic phrasing, atom-loss wording, proposed-versus-demonstrated qLDPC on atoms, post-selection caveats, assumed links, five-to-one scope, benchmark notes, universal negatives."]},"ai_assisted":true,"price":{"usd":"0.20","protocol":"x402","network":"eip155:84532","asset":"USDC"},"url":"https://space-kitty.com/dossiers/quantum-error-correction","preview_url":"https://space-kitty.com/api/v1/dossiers/quantum-error-correction/preview","purchase_url":"https://space-kitty.com/api/v1/dossiers/quantum-error-correction"},"top_papers":[{"id":"arxiv:2312.03982","kind":"article","title":"Logical quantum processor based on reconfigurable atom arrays","authors":["Dolev Bluvstein","Simon J. Evered","Alexandra A. Geim","Sophie H. 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