# Neutral-Atom & Trapped-Ion Quantum Computing: State of the Field (October 2026)

Research dossier · v1 · updated 2026-10-30 · 4,839 words · 42 sources · 28 claims · verification: verified

Neutral-atom and trapped-ion processors are two prominent atomic platforms for quantum computing. This dossier compares their gate and readout records, register sizes, error-correction experiments, interconnect work and architectural proposals as of late October 2026. The main takeaway is a split lead: the Helios ion processor reports the lowest two-qubit error figure covered here, though as a system average, while atom arrays hold the largest trapped registers and the logical-level demonstrations covered here.

## Contents

- Executive summary
- Background and core concepts
- Timeline of key milestones
- State of the art
  - Trapped ions: system benchmarks and QCCD hardware
  - Neutral atoms: gate fidelity and encodings
  - Arrays, assembly and tweezer control
  - Logical qubits, readout and error correction
  - Interconnects and modular architectures
  - Quantitative benchmarks
- Open problems and active debates
- Major programs and players
- Outlook: what to watch (next 12-18 months)
- Key papers
- Glossary

## Sample findings

- Helios reports average infidelities of 7.9(2)×10^-4 for two-qubit gates, 2.5(1)×10^-5 for single-qubit gates and 4.8(6)×10^-4 for state preparation and measurement, each averaged over all operational zones of a 98-qubit trapped-ion processor.
- Parallel two-qubit gates reached 99.5% fidelity on up to 60 atoms; the method uses optimal-control pulses and dark states to limit scattering.

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