# Quantum Error Correction & Fault Tolerance: State of the Field (October 2026)

Research dossier · v1 · updated 2026-10-29 · 6,183 words · 90 sources · 40 claims · verification: verified

An expert briefing on quantum error correction as of late October 2026: surface, color and qLDPC codes, bosonic and erasure qubits, real-time decoding, magic-state preparation and fault-tolerant resource estimates. The main takeaway is that below-threshold error suppression has been shown on superconducting hardware, in a short neutral-atom surface-code circuit and, in a 2026 preprint, in trapped-ion color-code memories, so the bottleneck has shifted to logical gates, magic-state cost, decoding latency, correlated errors and scale. Published estimates for factoring RSA-2048 have fallen from 20 million noisy qubits (2019) to under one million (2025); 2026 preprints claim under 100,000 with qLDPC codes, and Shor's algorithm at cryptographically relevant scale on as few as 10,000 reconfigurable atoms, with runtime falling as qubits are added, all assuming hardware not yet demonstrated at scale.

## Contents

- Executive summary
- Background and core concepts
- Timeline of key milestones
- State of the art
  - Superconducting surface codes
  - Color codes and trapped-ion logical circuits
  - Neutral-atom logical processors
  - Bosonic and noise-biased encodings
  - qLDPC and other high-rate codes
  - Magic states and non-Clifford logic
  - Decoding and classical co-processing
  - Resource estimates
  - Quantitative benchmarks
- Open problems and active debates
- Major programs and players
- Outlook: what to watch (November 2026 to April 2028)
- Key papers
- Glossary

## Sample findings

- Google's 101-qubit distance-7 surface-code memory reached 0.143% ± 0.003% logical error per cycle, with error suppression Λ = 2.14 ± 0.02 per distance step of two.
- The distance-7 Willow logical memory outlived its best physical qubit by a factor of 2.4 ± 0.3.

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